Keynote Speakers  ：

Prof.ALEX NOEL JOSEPH RAJ（Shantou University）

experience：ALEX NOEL JOSEPH RAJ received the B.E. degree in Electrical Engineering from Madras University, India,in 2001, the M.E. degree in Applied Electronics from Anna University in 2005, and the Ph.D. degree in Engineering from the University of Warwick, Coventry, UK in 2009.  From October 2009 to September 2011, he was with Valeport Ltd Totnes, UK as Design Engineer.  From March 2013 to March 2017 he was with the Department of Embedded Technology, School of Electronics Engineering, VIT University, Vellore, India as a Professor.  Since March 2017, he is with Department of Electronic Engineering, College of Engineering, Shantou University, China.  His research interests include Machine Learning, Signal and Image Processing and FPGA implementations. He is specialised in Image processing, with Industrial and Teaching experience in Machine Learning, Deep Networks Signal and Medical Image Processing, FPGA system design, Matlab, Simulink, Machine Vision Systems, SONAR systems and Embedded Systems.

Prof.Canhao Xu（BNU-HKBU United International College）

Speech Title: Hardware/Software Codesign of Efficient Deep Learning Algorithms

Abstract: The efficiency of machine learning and deep learning algorithms is more and more important nowadays. Improving accuracy without considering model efficiency is undesirable. Deep learning algorithms on embedded devices, such as educational devices and/or educational robots, often have demanding real-time requirements. For example, object recognition systems based on cameras usually require a latency of hundreds of milliseconds to respond to events in a timely manner. Commercial embedded devices sometimes offload the machine learning algorithms to the cloud. However, network connection quality and speed are becoming another challenging constraint for these devices. Another choice is to implement a high efficient deep learning algorithm on the embedded device, which isn’t affected by the internet connection. Enabling deep learning on the embedded device is difficult. The main characteristic of embedded devices is low power, which usually means the limited computational capability of the processor and limited size of the memory. From the perspective of software/hardware codesign, in order to speed up the processing speed of deep learning and image recognition algorithms, optimizations at both the algorithmic and hardware-level are required.

Dr. Guanglei Wu（Dalian University of Technology）

experience：

Dr. Guanglei Wu received his PhD in mechanical engineering from Aalborg University, Denmark, 2013. He was granted an industrial project by Innovation Fund Denmark and worked as a postdoc fellow in Aalborg University from 2014 to 2016. He was a visiting scholar in the Research Institute in Communications and Cybernetics of Nantes (IRCCyN, the former LS2N) in 2012, and a visiting .scholar in Aarhus University of Technology in 2020, China. Currently, he is an associate professor in Dalian University of Technology. His research interests include robotic technology and their applications. He has published a monograph by Springer and over 70 research papers, he was the awardee of the Asian MMS 2016 & CCMMS 2016, and he has been internationally recognized. He is the referee of a number of international journals and conferences in the fields of mechanisms and robots.